1. Technical Field
The present disclosure relates to a power amplifier circuit, and more particularly, to a class-D power amplifier circuit used to amplify an audio signal.
2. Discussion of the Related Art
Class-D amplifiers are also known as digital amplifiers. Digital amplifiers convert audio signals into pulse signals, amplify the pulse signals, and output them to speakers. Class-D amplifiers include a pulse width modulation (PWM) unit which converts an audio signal into a pulse signal. The PWM unit has a comparator type circuit and outputs a predetermined sawtooth wave signal that can be compared with the audio signal. The PWM unit compares the audio signal with the sawtooth wave signal, outputs a “1” when the amplitude of the audio signal is greater than the sawtooth wave signal, and outputs a “0” when the amplitude of the audio signal is smaller than the sawtooth wave signal. Analog amplifiers which use a vacuum tube or a transistor suffer from signal distortion due to noise generated by the thermal motion of electrons and nonlinearity of an amplifier element. Furthermore, analog amplifiers have low power use efficiency. However, digital amplifiers have a high power use efficiency and thus are used more widely than analog amplifiers.
Commonly, Class-D amplifiers include a power transistor at an output terminal in order to drive current needed to transmit an output signal of a PWM unit to an external speaker. Conventional power transistors have a large rate of current variation and a large switching peak voltage due to parasitic inductance caused by a bonding wire or the like.
FIG. 1 is a circuit diagram of a conventional class-D amplifier. Referring to FIG. 1, the conventional class-D amplifier includes a power supply node 39, a first inverter IN1, a second inverter IN2, a pull-up transistor 36, and a pull-down transistor 37.
The first inverter IN1 is connected between the power supply node 39 and a ground and includes a positive-channel metal-oxide semiconductor (PMOS) transistor 31 and a negative-channel MOS (NMOS) transistor 32. The first inverter IN1 receives an output signal PMOS_IN of a PWM unit (not shown) and inverts and outputs the signal PMOS_IN. The pull-up transistor 36 is connected between the power supply node 39 and an output node OUTN and is turned on in response to an output signal of the first inverter IN1. The pull-up transistor 36 is turned on when the output signal PMOS_IN of the PWM unit is a high level and supplies current from the power supply node 39 to the output node OUTN to pull up an output signal OUTP to a supply voltage level.
The second inverter IN2 is connected between the power supply node 39 and the ground and includes a PMOS transistor 33 and an NMOS transistor 34. The second inverter IN2 receives an output signal NMOS_IN of a PWM unit (not shown) and inverts and outputs the signal NMOS_IN. The pull-down transistor 37 is connected between the output node OUTN and the ground and is turned on in response to an output signal of the second inverter IN2. The pull-down transistor 37 is turned on when the output signal NMOS_IN of the PWM unit is a low level and pulls down an output signal OUTP to a ground voltage level.
Conventionally, a ratio of a width to a length, i.e., W/L of the pull-up transistor 36 and the pull-down transistor 37 is increased to increase the amount of current per hour, whereby an increase in high output power is obtained. However, when the amount of current per hour is changed rapidly, electromagnetic interference (EMI) occurs. In conventional technology, since a switching peak voltage is large due to the switching operation of a power transistor, a large amount of harmonic components are present. Harmonic components raise electronic wave interference in peripheral circuits, causing the circuits to malfunction.